PIC16F639-E/SS【PDF 48/74 页】IC MCU FLASH 2KX14 20SSOP

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Sheet目录3876

44页 45页 46页 47页 [48页]49页 50页 51页 52页

Micrel, Inc.

KSZ8841-PMQL

October 2007

M9999-100407-1.5

Wakeup Frame 3 Byte Mask 0 Register (Offset 0x0254): WF3BM0

This register contains the first 16 bytes mask values of the Wake up frame 3 pattern. Setting bit 0 selects the first byte

of the Wake up frame 3; setting bit 15 selects the 16th byte of the Wake up frame 3.

Bit

Default

R/W

Description

15 - 0

WF3BM0

Wake up Frame 3 Byte Mask 0

The first 16bytes mask of a wake up frame 3 pattern.

Wakeup Frame 3 Byte Mask 1 Register (Offset 0x0256): WF3BM1

This register contains the next 16bytes mask values of the Wake up frame 3 pattern. Setting bit 0 selects the 17th byte

of the Wake up frame 3; setting bit 15 selects the 32nd byte of the Wake up frame 3.

Bit

Default

R/W

Description

15 - 0

WF3BM1

Wake up Frame 3 Byte Mask 1

The next 16bytes mask covering bytes 17 to 32 of a wake up frame 3

pattern.

Wakeup Frame 3 Byte Mask 2 Register (Offset 0x0258): WF3BM2

This register contains the next 16bytes mask values of the Wake up frame 3 pattern. Setting bit 0 selects the 33rd byte

of the Wake up frame 3; setting bit 15 selects the 48th byte of the Wake up frame 3.

Bit

Default

R/W

Description

15 - 0

WF3BM2

Wake up Frame 3 Byte Mask 2

The next 16bytes mask covering bytes 33 to 48 of a wake up frame 3

pattern.

Wakeup Frame 3 Byte Mask 3 Register (Offset 0x025A): WF3BM3

This register contains the last 16bytes mask values of the Wake up frame 3 pattern. Setting bit 0 selects the 49th byte

of the Wake up frame 3; setting bit 15 selects the 64th byte of the Wake up frame 3.

Bit

Default

R/W

Description

15 - 0

WF3BM2

Wake up Frame 3 Byte Mask 3

The last 16 bytes mask covering bytes 49 to 64 of a wake up frame 3

pattern.

Chip ID and Enable Register (Offset 0x0400): CIDER

This register contains the chip ID, and the chip enables control.

Bit

Default

R/W

Description

15-8

0x88

Family ID

Chip family ID

7-4

0x05

Chip ID

0x05 is assigned to KSZ8841-PMQL

3-1

000

Revision ID

Start Controller

1 = Start the chip operation

0 = Stop the chip operation

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